02-18-2016, 05:05 PM -
I guess the doubled perf is due to some bug/implementation bottleneck in the SPU management code.
There is no accuracy issue when using a cpu with SMT vs a cpu without SMT. RPCS3 is executing PPU threads in separate host cpu threads ; they're not aware of "what" runs them, what matters is that they can use some synchronisation mechanism.
IEEE 754 compliance can be an issue ; extra instructions are required to make compliant cpu (like x64) "uncompliant" one. BTW RSX doesn't follow IEEE 754 norm and it's the root of some gfx bugs.
There's no dedicated Accumulation buffer in RSX. I'm not really sure what the feature did bring to the table though since you can use offscreen framebuffer and blending to achieve similar effect.
RSX supports quads.
There is no accuracy issue when using a cpu with SMT vs a cpu without SMT. RPCS3 is executing PPU threads in separate host cpu threads ; they're not aware of "what" runs them, what matters is that they can use some synchronisation mechanism.
IEEE 754 compliance can be an issue ; extra instructions are required to make compliant cpu (like x64) "uncompliant" one. BTW RSX doesn't follow IEEE 754 norm and it's the root of some gfx bugs.
There's no dedicated Accumulation buffer in RSX. I'm not really sure what the feature did bring to the table though since you can use offscreen framebuffer and blending to achieve similar effect.
RSX supports quads.